1. Field of the Invention
The present invention generally relates to serializer/de-serializer integrated circuits with multiple high-speed data ports, and more particularly to a serializer/de-serializer chip that includes the functionality to switch between multiple high-speed data ports.
2. Background Art
High-speed data links transmit data from one location to another over transmission lines. These data links can include serializer/deserializer data links (i.e. SERDES) that receive data in a parallel format and convert the data to a serial format for high-speed transmission. SERDES data links can be part of a backplane in a communications system.
In a high-speed back plane configuration, it is often desirable to switch between multiple SERDES links. In other words, it is often desirable to switch between any one of multiple SERDES links to another SERDES link, and to do so in a low power configuration on a single integrated circuit.